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A 6-F2 bit cell design based on one transistor and two uneven magnetic tunnel junctions structure and low power design for MRAM
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A 6-F2 bit cell design based on one transistor and two uneven magnetic tunnel junctions structure and low power design for MRAM

Chien-Chung Hung, Ming-Jer Kao, Young-Shying Chen, Yung-Hung Wang, Yuan-Jen Lee, Wei-Chuan Chen, Wen-Chin Lin, Kuei-Hung Shen, Kuo-Lung Chen, Shiuh Chao, …
IEEE Transactions on Electron Devices, Vol.53(7), pp.1530-1538
07/2006

Abstract

High density Low power Magnetic memories Magnetic tunnel junction (MTJ) Magnetoresistive devices Magnetoresistive random access memory (MRAM)
Novel cell structures based on one transistor and two uneven magnetic tunnel junction cell and pillar write word line architecture are proposed to shrink the bit size with a potential down to 6 F 2 by a so-called extended via process, and to reduce the writing current by a factor of 2, combined with the nature of nonvolatility and high speed, making the magnetoresistive random access memory suitable for universal memory applications. © 2006 IEEE.

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