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A 76.2-89.1 GHz Phase-Locked Loop with 15.6% Tuning Range in 90 nm CMOS for W-Band Applications
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A 76.2-89.1 GHz Phase-Locked Loop with 15.6% Tuning Range in 90 nm CMOS for W-Band Applications

Kai-Wen Tan, Ta-Shun ChuShawn S. H. Hsu
IEEE Microwave and Wireless Components Letters, 卷.25(8), 頁碼.538-540
08/2015

摘要

Phase-locked loop (PLL) tripler voltage-controlled oscillator (VCO) W-band wideband Condensed Matter Physics Electrical and Electronic Engineering
In this letter, a wide tuning range W-band phase-locked loop (PLL) in 90 nm CMOS is presented. A novel frequency tripling topology with a single cross-coupled pair and a dual tank is proposed for the voltage-controlled oscillator (VCO) to achieve wide tuning characteristics under low power consumption. The locking range of the PLL at the fundamental tone is 25.4-29.7 GHz, and an excellent tuning range at the third harmonic frequency up to 12.9 GHz (from 76.2 to 89.1 GHz, 15.6%) is obtained. Under a 1.2 V supply voltage $({m P}-{m diss}=62.4 {m mW})$ , the measured closed-loop phase noise of the PLL is $-$83.5 dBc/Hz at 78.34 GHz. To the best of our knowledge, the achieved turning range is the highest currently reported for the PLLs operating in a similar frequency range in CMOS technology.

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