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A Driver-Integrated 4H-SiC SiP with 560 MW/cm2 BFOM and 10MHz High-Speed Switching Capability
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A Driver-Integrated 4H-SiC SiP with 560 MW/cm2 BFOM and 10MHz High-Speed Switching Capability

Fu-Jen Hsu Frane, Hsiang-Ting Hung, Cheng-Tyng Yen 和 Chih-Fang Huang
IEEE transactions on power electronics, 頁碼.1-10
13/07/2026

摘要

Current Design methodology Generative adversarial networks MOSFET Silicon Silicon carbide Switches Temperature Timing Voltage
This paper presents a heterogeneous Si-SiC SiP designed for power conversion. The SiP co-integrates a gate driver, featuring an active Miller clamp, UVLO, and a zero- V CC startup circuit, with an 850V SiC MOSFET in a single package. By minimizing parasitic inductance, the SiP demonstrates a hard-switching operation capability of up to 10 MHz in a multi-pulse test (MPT) platform. At the device level, the SiC DMOS achieves a remarkable BFOM of 560MW/cm 2 , which is the best-in-class reported SiC DMOS without super-junction or engineered substrate techniques. Furthermore, the HFFOM outperforms state-of-the-art GaN and SiC discrete devices and ICs. Additional characterization reveals a 130mV/dec S.S. and negligible 0.8mV/V DIBL. Experimental results demonstrate an 18.2% reduction in switching loss compared to discrete benchmarks, with C oss hysteresis loss restricted to only 1.16% of E oss . The reliability and versatility of the platform are validated through AEC-Q101 and comprehensive testing in Multi-Pulse Test, PFC, QR-flyback, and LLC converters. This work establishes a viable and cost-effective path for the next generation of high-frequency power electronics.

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