摘要
This paper presents a rail-to-rail buffer architecture for TFT-LCD driver ICs that addresses two practical challenges: bandwidth degradation near the supply rails and potential instability during on-wafer testing under heavy capacitive loading. Four auxiliary current buffers are introduced into the floating class-AB core to shorten internal control paths and maintain wide bandwidth across the full input range. To ensure stable operation with an 80-pF on-wafer load, the second-stage amplifier is partitioned and an impedance RZ is inserted to generate a left-half-plane zero for effective pole-zero compensation. In addition, a compact MUX structure with integrated ESD protection is co-designed to reduce the effective output-path resistance without enlarging switch devices. By redistributing the ESD resistance across parallel branches, the proposed design shortens the RC time constant and improves area efficiency. Fabricated in a 0.18-& micro;m CMOS process, the 20-channel prototype demonstrates stable, oscillation-free operation under 80-pF on-wafer loading and achieves 90% settling times of 346 ns (0.2-2.3 V) and 248 ns (2.7-4.8 V), with corresponding 99% settling times of 1.65 & micro;s and 1.51 & micro;s, respectively, under a 5-k Omega/400-pF five-stage distributed R-C load emulating a TFT-LCD data line.