摘要
A 5-V-only CMOS 4-Mb NAND EEPROM with high-speed block-page programming circuits and on-chip test circuits for evaluating the NAND-structured cell is described. This high-density EEPROM has successfully demonstrated the applicability of these techniques for micro-computer applications, which require a large nonvolatile memory system with low power consumption. 0018-9200/90/0400-0417$01.00 © 1990 IEEE