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A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read only Memory with Tungsten Control Gate by Full CMOS Process
Journal article   Peer reviewed

A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read only Memory with Tungsten Control Gate by Full CMOS Process

Chih-Ping Chung and Kuei-Shu Chang-Liao
IEEE Electron Device Letters, Vol.36(4), pp.336-338
01/04/2015
DOI: https://doi.org/10.1109/LED.2015.2404854

Abstract

embedded EEPROM full CMOS process metallic control gate single poly-silicon EEPROM tungsten finger coupling
A highly scalable single poly-silicon multiple time programmable erasable programmable read only memory (EEPROM) with tungsten metallic control gate (W-CG) manufactured by full 0.13 μm-CMOS process is successfully demonstrated in this letter. Since the coupling ratio of conventional EEPROM cell is reduced with decreasing cell size, a smaller size in W-CG cell with a reduced spacing of CG to floating gate (FG) can obtain a higher coupling ratio and increase programming/erasing window owing to its novel lateral metal-insulator-poly coupling structure.

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