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A Retention-Aware multilevel cell phase change memory program evaluation metric
Journal article   Peer reviewed

A Retention-Aware multilevel cell phase change memory program evaluation metric

Win-San Khwa, Meng-Fan Chang, Jau-Yi Wu, Ming-Hsiu Lee, Tzu-Hsiang Su, Tien-Yen Wang, Hsiang-Pang Li, Matthew BrightSky, SangBum Kim, Hsiang-Lan Lung, …
IEEE Electron Device Letters, Vol.37(11), pp.1422-1425
01/11/2016

Abstract

Multiple-level cell Phase change memory Programming scheme Resistance drift
Multilevel cell (MLC) phase change memory (PCM) offers many potential advantages in scalability, bit-Alterability, non-volatility, and high program speed. While many program approaches had been proposed, they were usually evaluated in energy, delay, or energy-delay product (EDP). These metrics, however, often overlook the data integrity maintenance (DIM) overhead caused by the resistance drift (R-drift) phenomenon in the MLC PCM. This letter proposes a programmaintenance (PM) metric, which is a modified EDP metric with DIM consideration. Furthermore, we evaluated the PM metric of various pulse shapes in iterative program-verify scheme. From the measured data of a 128M-cell MLC PCM chip, we showed that the PM metric of optimized pulse shape is better than those of the conventional SET and RESET pulse shapes up to 86.7%.

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