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A Scalable and Latency-aware HBF Precoding Design for LEO Satellite Communications
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A Scalable and Latency-aware HBF Precoding Design for LEO Satellite Communications

Tzu-Yi Yang, Meng-Lin Ku, Hong-fu Chou, Symeon Chatzinotas, Hua-Lung Tsai 和 Yeong-Luh Ueng
IEEE transactions on vehicular technology, 頁碼.1-14
2026

摘要

Arrays Beamspace channel Design methodology Educational institutions hybrid beamforming Low earth orbit satellites low-earth-orbit (LEO) satellite communications Matrices Memory millimeter wave MIMO multiple-input multiple-output (MIMO) Precoding Satellites Very large scale integration VLSI architecture
Hybrid beamforming (HBF) represents a highly auspicious technological advancement that capitalizes on the strengths of massive multiple-input multiple-output (mMIMO) systems operating at millimeter wave (mmWave). The low-earth orbit (LEO) satellites utilize HBF methods to achieve high throughput and global communication while maintaining minimal resource utilization. However, standard HBF precoding requires comprehensive channel state information (CSI) and singular value decomposition (SVD) operations to build the optimum precoding matrix. Due to the high resource demands on LEO satellite systems and in light of the challenges faced in previous research efforts, we present a novel method for HBF precoding. This approach utilizes the beamspace minimum mean square error (BS-MMSE) precoding algorithm, which offers two advantages: reduced complexity in precoding and elimination of the need for explicit mMIMO channel estimation. The resolution of the hardware bottleneck associated with the BS-MMSE precoding method can be addressed by employing an LDL decomposition-based matrix inversion methodology. To enhance transmission efficiency, the utilization of low-latency precoding is considered for the development of reconfigurable matrix multiplication. Additionally, this design includes the implementation of latency-aware module scheduling to achieve fast precoding. We have successfully developed a BS-MMSE precoding design for the 1024 × mMIMO LEO satellite system that is both cost-effective and latency-aware. This design has excellent hardware scalability, allowing it to accommodate different quantities of user terminals (UTs). The implementation is carried out based on TSMC's 90-nm CMOS technology. The system operating at a clock speed of 179 MHz leads to a reduction in both precoding latency of up to 51% and cell area of at least 44% as compared to the current state-of-the-art architecture.

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