Abstract
This paper provides a SiGe optical receiver using new high performance differential active Miller capacitor (DAMC) circuits to replace off-chip capacitors. The fully integrated design can avoid off-chip noise interference. The 4.25 Gbit/s optical receiver was realized in a commercial 0.35 μm SiGe BiCMOS process. The measured results of the receiver demonstrate a differential output swing of 530 mV with 50 ßoutput loads, a crossing percentage of 51.6%, a peak-to-peak jitter (jitter p-p ) of 23.9 ps, and an input sensitivity of -13.8 dBm, respectively, at a bit error rate (BER) of 10 -12 with a 2 31 -1 pseudo random binary sequences (PRBS) test pattern. The total circuit dissipates 105.6 mW under a 3.3 V supply, and the chip size is 945 × 980 μm 2 . © 2008 The Japan Society of Applied Physics.