Abstract
Logarithmic-response complementary metal oxide semiconductor (CMOS) active pixel sensors provide a desirable attribute of wide dynamic range even with low supply voltages. In this paper, a log-mode pixel with employing parasitic P-N-P bipolar junction transistor (BJT) to amplify photo-current is investigated and optimized. A new log-mode cell with a calibration transistor is proposed to increase the output voltage swing as well as to reduce the fixed pattern noise. The measurement results demonstrate that, the output voltage swing of this new cell is enhanced by 4× and fixed pattern noise (FPN) of a pixel array can be reduced by 10× comparing to that of a conventional log-mode CMOS active pixel sensor. © 2006 The Japan Society of Applied Physics.