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A new 2T contact coupling gate MTP memory in fully CMOS compatible process
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A new 2T contact coupling gate MTP memory in fully CMOS compatible process

Chiu-Wang Lien, Haw-Yun Wu, Cheng-Wei Tsai, Chen-Mei Huang, Yue-Der Chih, Te-Liang LeeChrong Jung Lin
IEEE Transactions on Electron Devices, 卷.59(7), 頁碼.1899-1905
2012

摘要

Contact coupling embedded logic compatible memory logic nonvolatile memory (NVM) multitime programmable (MTP) NVM Electrical and Electronic Engineering Electronic Optical and Magnetic Materials
A new fully logic process compatible 2T multitime programmable (MTP) memory cell has been introduced for embedded logic nonvolatile memory (NVM) applications. The cell adopts a novel contact coupling gate structure as an additional control gate for highly efficient operation and high-density memory applications. A new 2T n-channel MTP 2-Kb memory test chip has been also successfully demonstrated on pure 0.18-μm CMOS logic process without extra masking or process step. Furthermore, the embedded 2T MTP cell performs an efficiently program/erase operation by CHE injection and FN tunnel with highly reliable endurance and retention characteristics. © 2012 IEEE.

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