Abstract
This work presents a novel differential n-channel logic-compatible multiple-time programmable (MTP) memory cell. This cell features double sensing window by a differential pair of floating gates, and therefore increases the retention lifetime of the nonvolatile memory effectively. Also, a self-selective programming (SSP) method is innovated in writing one pair differential data by a single cell without increasing any design or process complexity in peripheral circuit. The differential cell is a promising MTP solution to challenge thin floating gate oxide below 70Å for 90nm complementary metal-oxide- semiconductor (CMOS) node and beyond. © 2010 The Japan Society of Applied Physics.