A new high-density twin-gate isolation one-time programmable memory cell in pure 28-nm CMOS logic process

Woan Yun Hsiao; Ping Chun Peng; Tzong-Sheng Chang; Yu-Der Chih; Wu-Chin Tsai; Meng-Fan Chang; Tun-Fei Chien; Ya-Chin King; Chrong-Jung Lin

doi:10.1109/TED.2014.2371617

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A new high-density twin-gate isolation one-time programmable memory cell in pure 28-nm CMOS logic process

Journal article

Peer reviewed

A new high-density twin-gate isolation one-time programmable memory cell in pure 28-nm CMOS logic process

Woan Yun Hsiao, Ping Chun Peng, Tzong-Sheng Chang, Yu-Der Chih, Wu-Chin Tsai, Meng-Fan Chang, Tun-Fei Chien, Ya-Chin King and Chrong-Jung Lin

IEEE Transactions on Electron Devices, Vol.62(1), pp.121-127

01/01/2015

DOI: https://doi.org/10.1109/TED.2014.2371617

Abstract

Antifuse

high-k dielectric breakdown

logic nonvolatile memory (NVM)

one-time programmable (OTP) memory.

A new and compact high-k dielectric breakdown one-time programmable (OTP) cell in pure 28-nm high-k metal gate (HKMG) process is proposed. By adopting a self-aligned twin-gate isolation (TGI) made by merged gate spacer, the new OTP cell can operate independently with a very small cell area. Fabricated by a pure 28-nm HKMG CMOS logic process, this OTP cell successfully achieves an ultrasmall cell size of 0.0441 μ m ² on 28-nm HKMG CMOS logic platform. Using high-k dielectric breakdown as its program mechanism, the antifuse TGI OTP memory has more than three orders of ON/OFF read window with a low program voltage of 4 V in 20 μ s. Furthermore, a highly density 64-kbit TGI OTP array has been fabricated and successfully demonstrates the new superior isolation and reliability performances.

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Title: A new high-density twin-gate isolation one-time programmable memory cell in pure 28-nm CMOS logic process
Creators - without role: Woan Yun Hsiao - National Tsing Hua University
Ping Chun Peng - National Tsing Hua University
Tzong-Sheng Chang - Taiwan Semiconductor Manufacturing Company (Taiwan)
Yu-Der Chih - Taiwan Semiconductor Manufacturing Company (Taiwan)
Wu-Chin Tsai - Taiwan Semiconductor Manufacturing Company (Taiwan)
Meng-Fan Chang - Institute of Electronics Engineering, National Tsing Hua University
Tun-Fei Chien - National Tsing Hua University
Ya-Chin King - Institute of Electronics Engineering, National Tsing Hua University
Chrong-Jung Lin - National Tsing Hua University
Publication Details: IEEE Transactions on Electron Devices, Vol.62(1), pp.121-127
Identifiers: 9957768891106774
Academic Unit: Institute of Electronics Engineering, College of Electrical Engineering and Computer Science, National Tsing Hua University
Language: English
Resource Type: Journal article

A new high-density twin-gate isolation one-time programmable memory cell in pure 28-nm CMOS logic process

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