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A process variation tolerant embedded split-gate flash memory using pre-stable current sensing scheme
Journal article   Peer reviewed

A process variation tolerant embedded split-gate flash memory using pre-stable current sensing scheme

Meng-Fan Chang and Shin-Jang Shen
IEEE Journal of Solid-State Circuits, Vol.44(3), pp.987-994
03/2009

Abstract

Flash Process variation Split-gate
Replica-cell sensing schemes are commonly used in the read circuits of flash memories to provide the appropriate reference current across various process, voltage and temperature (PVT) conditions. However, process variation on the replica array causes fluctuations in the settling time and the value of the reference current across dies or wafers, especially in split-gate flash memories. A long settling time of reference current slows down the access time, and causes ringing on outputs. Fluctuation in the reference current produces various sensing margins, and decreases the yield, due to tail bits. A circuit-level technique for embedded flash memories, called pre-stable current sensing (PSCS), is proposed to reduce the fluctuation in access time and sensing margin, without additional masks or process steps. Experiments on fabricated flash macros (4 Mb, 2 Mb, 1 Mb, and 512 Kb) using a 0.25 μm embedded flash process demonstrate that PSCS achieves uniform access time across hundreds of samples. Additionally, PSCS works with a wide range of supply voltages (1.13 V). © 2006 IEEE.

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