摘要
Reducing learning energy consumption is critical to edge-artificial intelligence (AI) processors with on-chip learning since on-chip learning energy dominates energy consumption, especially for applications that require long-term learning. To achieve this goal, we optimize a neuromorphic learning algorithm and propose random target window (TW) selection, hierarchical update skip (HUS), and asynchronous time step acceleration (ATSA) to reduce the on-chip learning power consumption. Our approach results in a 28-nm 1.25-mm<inline-formula> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> asynchronous neuromorphic processor (ANP-I) with on-chip learning energy per sample less than 15% of inference energy per sample. With all weights randomly initialized, this processor enables on-chip learning for edge-AI tasks such as gesture recognition, keyword spotting, and image classification, consuming sub-0.1 <inline-formula> <tex-math notation="LaTeX">$mu $</tex-math> </inline-formula>J of learning energy per sample at 0.56 V and 40-MHz frequency while maintaining <inline-formula> <tex-math notation="LaTeX">$>$</tex-math> </inline-formula>92% accuracy for all tasks.