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An Effective Low-Complexity Error-Floor Lowering Technique for High-Rate QC-LDPC Codes
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An Effective Low-Complexity Error-Floor Lowering Technique for High-Rate QC-LDPC Codes

Huang-Chang Lee, Po-Chiao ChouYeong-Luh Ueng
IEEE Communications Letters
08/2018

摘要

Attenuation Decoding Electrical engineering Error floor Indexes Low-complexity decoder Low-density Parity-check (LDPC) Codes Parity check codes Signal to noise ratio Standards Modeling and Simulation Computer Science Applications Electrical and Electronic Engineering
This paper presents a low-complexity redecodingbased error-floor lowering technique for quasi-cyclic (QC) lowdensity parity-check (LDPC) codes, where a predetermined set of variable nodes are attenuated before the redecoding. Using a twostage offline search, the attenuation set is determined based on the error patterns collected from the standard decoding simulation. It is shown that the error floor can be effectively lowered and only a negligible amount of complexity is introduced.

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