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An ULV PWM CMOS imager with adaptive-multiple-sampling linear response, HDR imaging, and energy harvesting
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An ULV PWM CMOS imager with adaptive-multiple-sampling linear response, HDR imaging, and energy harvesting

Albert Yen-Chih ChiouChih-Cheng Hsieh
IEEE Journal of Solid-State Circuits, 卷.54(1), 頁碼.298-306
01/2019

摘要

Adaptive multiple sampling (AMS) CMOS image sensor (CIS) dual-slope ramping (DSR) energy harvesting (EH) high dynamic range (HDR) linear response (LR) pulsewidth modulation (PWM) signal-to-noise ratio (SNR) ultra-low voltage (ULV) Electrical and Electronic Engineering
This paper presents an ultra-low-voltage (ULV) 300 × 200 pixel pulsewidth-modulation (PWM) CMOS imager with monitoring and capturing for Internet-of-Things (IoT) and artificial intelligent (AI) applications, fabricated in the CMOS 0.18-μm standard process technology. In always-ON monitoring operation, the imager provides high dynamic range (HDR) and energy harvesting (EH) modes for event detection and energy collection, respectively. In low-power image capturing operation, the imager provides a linear-response (LR) mode for object identification and recording. In the LR mode, the proposed ULV PWM pixel with threshold variation cancellation (TVC) achieves a non-linearity of +0.36/-0.29% and a fixed-pattern noise (FPN) of 0.159%. With the proposed pixel-wise adaptive-multiple-sampling (AMS) scheme and the corresponding n-time multiple sampling using dual-slope ramping (DSR) reference, the 0.4-V-operated PWM pixel achieves a total noise of 9.42e - at 4-time AMS operation. The achieved peak signal-to-noise ratio (PSNR) and dynamic range (DR) are 60.1 dB in the LR mode and 141 dB in the HDR mode, respectively, and the harvested power is 15.5 μW at 60 klx in the EH mode.

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