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An energy-efficient partial FFT processor for the OFDMA communication system
Journal article   Peer reviewed

An energy-efficient partial FFT processor for the OFDMA communication system

Chao-Ming Chen, Chien-Chang Hung and Yuan-Hao Huang
IEEE Transactions on Circuits and Systems II: Express Briefs, Vol.57(2), pp.136-140
02/2010

Abstract

Fast Fourier transform (FFT) Orthogonal frequency-division multiple access (OFDMA) Very large scale integration (VLSI)
In the orthogonal frequency-division multiple-access (OFDMA) communication system, resource allocation plays an important role in improving the transmission performance. The maximum spectral efficiency can be achieved through channel quality measurement, resource allocation, adaptive modulation, and so on. In this brief, we design a partial cached fast Fourier transform (FFT) processor that accounts for the distribution of allocated resources to the users of the OFDMA system. We also design a constellation- and power-aware twiddle-factor multiplier for the variable FFT length and modulation order. We implement a 128- to 1024-point mixed pipelined/cached-FFT processor using a 0.18- μm 1P6M CMOS technology. The chip measurement results show that its energy dissipation ranges from 0.09 to 1.90 nJ per FFT point and scales to the allocated resources in the OFDMA system. © 2010 IEEE.

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