摘要
In this study, a novel self-rectifying twin-bit via resistive random-access memory (Via RRAM) has been implemented in a cross-bar memory array using via and metal layers within the standard FinFET Back End of Line processes. By using SiO x and TaO x , this RRAM integrates well with advanced CMOS logic circuits. Additionally, this device can be put into a unique diode state (DS) with asymmetric IV characteristics after specific operations. By placing the device in its DS, sneak current paths can be effectively suppress to allow the realization of 1 R cross-bar array. Hence, the newly proposed cell provides a distinct advantage of integrating RRAM cross-bar array by top metal structures. This high-density array structure, featuring compact cell sizes, can be produced without the requirement for additional masks or processes. Moreover, as the density increases, it demonstrates reduced operational voltages and accelerated operating speeds.