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Artificial Defects in Si3N4 Enhance Nonvolatile Memory Performance of Ultra-Thin Body Poly-Si Junctionless Field-Effect Transistors
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Artificial Defects in Si3N4 Enhance Nonvolatile Memory Performance of Ultra-Thin Body Poly-Si Junctionless Field-Effect Transistors

Yu-Ru Lin, Wei-Cheng Wang, Lun-Chun ChenYung-Chun Wu
ECS Journal of Solid State Science and Technology ECS Journal of Solid State Science and Technology, 卷.5(4), 頁碼.3202-3205
2016

摘要

Si3N4;Nonvolatile Memory;Ultra-Thin Body Poly-Si Junctionless
This work presents a trench structure with n-type and p-type junctionless field-effect transistor (JL-FET) based on ultra-thin body (UTB) nonvolatile memory (NVM) devices with double stacked Si3N4 defect charge trapping layers (NN-CTLs). The n-type device exhibits excellent memory characteristics, including high program/erase (P/E) speed, good endurance (>104 cycles) and excellent (10-year) data retention at 85°C which achieve memory industry requirement. This simple double stacked Si3N4 trench JL-FET structure provides extra deep charge trapping sites in CTL, which improves the performance of JL-SONNOS NVMs for 3D NAND flash applications.

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