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Automatic interconnection rectification for SoC design verification based on the port order fault model
Journal article   Peer reviewed

Automatic interconnection rectification for SoC design verification based on the port order fault model

Chun-Yao Wang, Shing-Wu Tung and Jing-Yang Jou
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.22(1), pp.104-114
01/2003

Abstract

Automatic interconnection rectification (AIR) Characteristic vector (CV) Correction Detection Diagnosis Port order fault (POF) System-on-a-chip (SoC) Undetected port sequence (UPS) Verification
Embedded cores are being increasingly used in large system-on-a-chip (SoC) designs. The high complexity of SoC designs lead the design verification to be a challenge for system integrators. This paper presents an automatic interconnection rectification (AIR) technique based on the port order fault model to detect, diagnose, and correct the misplacements of interconnection that occurred in the integration of a SoC design automatically. The experiments are conducted on combinational and sequential benchmarks. Experimental results show that the AIR can correct the misplaced interconnection exactly within reasonable efforts and, therefore, accelerates the integration verification of SoC designs.

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