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Characteristic of p-type junctionless gate-all-around nanowire transistor and sensitivity analysis
Journal article   Peer reviewed

Characteristic of p-type junctionless gate-all-around nanowire transistor and sensitivity analysis

Ming-Hung Han, Chun-Yen Chang, Yi-Ruei Jhan, Jia-Jiun Wu, Hung-Bin Chen, Ya-Chi Cheng and Yung-Chun Wu
IEEE Electron Device Letters, Vol.34(2), pp.157-159
2013

Abstract

Gate-all-around (GAA) junctionless (JL) nanowire transistor sensitivity
The characteristics and sensitivities of p-type junctionless (JL) gate-all-around (GAA) (JLGAA) nanowire transistors are demonstrated by simulating a 3-D quantum transport device with a view to their use in CMOS technology. The concentration of dopants in a p-type JL nanowire transistor is not as high as that in an n-type device owing to solid solubility of boron in silicon. However, we can use a midgap material as gate electrode to design an appropriate device threshold voltage. The p-type JLGAA transistor exhibits a favorable on/off current ratio and better short-channel characteristics than a conventional inversion-mode transistor with a GAA structure. Sensitivity analyses reveal that the channel thickness and random dopant fluctuation substantially affect the device performance in terms of threshold voltage (V th ), on current (I on ), and subthreshold slope because of the full depletion condition of the channel. The channel length and oxide thickness have less impact because the short-channel effect is well controlled. © 1980-2012 IEEE.

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