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Characterization of multilayer metal gate fuse in 28-nm CMOS logic technology
Journal article   Peer reviewed

Characterization of multilayer metal gate fuse in 28-nm CMOS logic technology

Min-Che Hsieh, Yu-Cheng Lin, Yung-Wen Chin, Tzong-Sheng Chang, Ya-Chin King and Chrong-Jung Lin
IEEE Electron Device Letters, Vol.34(9), pp.1088-1090
2013

Abstract

Complementary metal-oxide-semiconductor (CMOS) fuse metal gate (MG)
In this letter, the characteristics of metal gate (MG) fuses in 28-nm complementary metal-oxide-semiconductor (CMOS) technology are investigated. Through analyzing its initial and after program characteristics, the fuse burning process is studied. The stacked layer MG fuses exhibit two stages in the burning process. These unique programming characteristics of the MG electronic fuse provide insights for the future development low power and high reliable electrically programmable fuses by advanced nanoscale CMOS technologies. © 1980-2012 IEEE.

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