Abstract
Ultrathin channel trench junctionless poly-Si field-effect transistor (trench JL-FET) with a 2.4-nm channel thickness is experimentally demonstrated. Dry etching process is used to form trench structures, which define channel thickness (T CH ) and gate length (L G ). These devices (L G = 0.5 μ m) show excellent performance in terms of steep subthreshold swing (100 mV/decade) and high I ON / I OFF current ratio (10 6 A/A) and practically negligible drain-induced barrier lowering (∼0 mV/V). The I ON current of the trench JL-FET can be further increased by the quantum confinement effect. Importantly, owing to its excellent device characteristics and simplicity of fabrication, the trench JL-FET has great potential for using in advanced 3-D-stacked IC applications.