摘要
We fabricated charge-trap non-volatile memories (NVMs) using low thermal budget processes, including laser-crystallization of poly-Si thin film, chemical vapor deposition deposition of a stacked memory layer, and far-infrared-laser dopant activation. The thin poly-Si channel has a low defect-density at the interface with the bulk, resulting in a steep subthreshold swing for the NVM transistors. The introduction of the stacked SiO 2 /AlO x N y tunnel layer and the SiN x charge-trap layer with a gradient bandgap leads to reliable retention and endurance at low voltage for the NVMs. The low thermal budget processes are desirable for the integration of the nano-scaled NVMs into system on panels.