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Design and Characterization of a CMOS Capacitive Sensor Array for Fast Normal Stress Analysis
期刊文章

Design and Characterization of a CMOS Capacitive Sensor Array for Fast Normal Stress Analysis

Tzu-Yu Huang, Sheng-Hsiang TsengMichael S.-C. Lu
IEEE Sensors Letters, 卷.6(6), 2500604
06/2022

摘要

capacitive sensor complementary metal oxide semiconductor (CMOS) Mechanical sensors pressure sensor tactile sensor Instrumentation Electrical and Electronic Engineering
This letter presents a dense 32 × 32 sensor array integrated in a complementary metal oxide semiconductor process for fast and sensitive detection of contact forces with fine spatial resolution. The sensing membranes made of metal and oxide thin films with a total thickness of 1.9 μm are released by wet etch of metal layers. Each sensing pixel is 140 × 140 μm2 in size, leading to an array size of 4.8 × 2.4 mm2. The simulated sensing and parasitic capacitance of 63 and 231 fF, respectively, are very close to the measured data. The array exhibited a capacitive sensitivity of 5.8 fF/kPa and an output change of 19.2 mV/kPa based on an integration time of 0.125 μs. This letter successfully demonstrated dynamic stress measurements with a maximum frame rate up to 1.8 kHz.

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