Abstract
The multiplier is a pervasive critical component today. However, most of them are difficult to be integrated into an integrated circuit. In this study, we proposed a novel analog multiplier for AC power application, using CMOS process to realize the analog voltage multiplication function of double-ended input and single-ended output. Under the working voltage of 3.3 V, the multiplier can operate with a wide input voltage range of 0–1.6 V (about 48.8% of the working voltage) and a wide output voltage range of 0–2.56 V (about 77.5% of the working voltage). The multiplier is implemented through the current difference between two NMOSs operating in the linear region and the saturation region, respectively. Compared with the existing technique, the proposed analog multiplier has a wider input and output range, and better linearity. It is suitable for AC power signal tracking and modulation. Finally, the United Microelectronics Corporation 0.18 μm 1P4M CMOS standard process was used for physical implementation. Moreover, there is not any BJT or special device used. It was measured that the analog multiplier circuit consumes about 0.56 mW at a working voltage of 3.3 V.