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Design of a Novel CMOS Front-End ASIC with Post Digital Shaping for CZT-Based PET Detector
Journal article   Peer reviewed

Design of a Novel CMOS Front-End ASIC with Post Digital Shaping for CZT-Based PET Detector

W. Gao, X. Li, S. Li, J. Yin, C. Li, D. Gao and Y. Hu
IEEE Transactions on Nuclear Science, Vol.63(3), pp.1586-1593
01/06/2016

Abstract

Analog-to-Digital Converter (ADC) Digital pulse shaping Front-end Electronics PET Imaging
This paper presents a novel front-end Application Specific Integrated Circuit (ASIC) dedicated to CZT detectors for positron-emission tomography (PET) imaging applications. The ASIC consists of a preamplifier using split-leg topology, a variable gain amplifier, a time-interleaved ramp ADC and a timing controller. The design techniques of these circuit blocks are discussed in detail. Meanwhile, the digital CR-RC shaping and the digital trapezoidal shaping are introduced as well. A prototype ASIC is implemented in CMOS 0.35 μm process. The preliminary results have been obtained. The detection range of the gamma ray is from 11.2 keV to 550 keV. The non-linearity of the output voltage is less than 3%. The gain of the readout channel is 40.2 V/pC. The test results show that the proposed front-end electronics is appropriable for PET imaging applications.

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