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Efficient BISR techniques for embedded memories considering cluster faults
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Efficient BISR techniques for embedded memories considering cluster faults

Shyue-Kung Lu, Chun-Lin Yang, Yuang-Cheng HsiaoCheng-Wen Wu
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 卷.18(2), 頁碼.184-193
02/2010

摘要

Cluster fault Embedded memory Modified essential spare pivoting (MESP) algorithm Repair rate Yield Software Hardware and Architecture Electrical and Electronic Engineering
Instead of the traditional spare row/column redundancy architectures, block-based redundancy architectures are proposed in this paper. The redundant rows/columns are divided into row/column blocks. Therefore, the repair of faulty memory cells can be performed at the row/column-block level. Moreover, the redundant row/column blocks can be used to replace faulty cells anywhere in the memory array. This global characteristic is helpful for repairing cluster faults. The proposed redundancy architecture can be easily integrated with the embedded memory cores. Based on the proposed global redundancy architecture, a heuristic modified essential spare pivoting (MESP) algorithm suitable for built-in implementation is also proposed. According to experimental results, the area overhead for implementing the MESP algorithm is very low. Due to efficient usage of redundancy, the manufacturing yield, repair rate, and reliability can be improved significantly. © 2009 IEEE.

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