摘要
Electrical characteristics of Si 0.7 Ge 0.3 /Si heterostructure-based n-type gate-all-around MOSFETs (GAA MOSFETs) are reported in this work through experimental and numerical simulation data. N-type GAA MOSFETs of varying lengths (60 nm to 160 nm) and widths (20 nm to 42 nm) are fabricated and measured to extract key electrical parameters like ON current, ON-to-OFF current ratio, threshold voltage, DIBL, and subthreshold swing. Moreover, the influence of tensile strain on carrier transport parameters in the buried Si layer is examined in this work. The Ge mole fraction in SiGe is raised from 0.2 to 0.3, and the corresponding changes in XX-stress, and current density are analyzed using a TCAD simulator. The performance of the proposed device has also been compared with unstrained SiGe/Si, all Si, and SiGe-based GAA MOSFETs.