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Electrical degradation and recovery of low-temperature polycrystalline silicon thin-film transistors in polycrystalline silicon plasma process
Journal article   Peer reviewed

Electrical degradation and recovery of low-temperature polycrystalline silicon thin-film transistors in polycrystalline silicon plasma process

Jiun-Jye Chang, Kuei-Shu Chang-Liao, Tien-Ko Wang, Yung-Chun Wu, Kao-Chao Lin, Chia-Yu Chen, Yu-Mou Chen, Jen-Pei Tseng and Min-Feng Hung
IEEE Transactions on Electron Devices, Vol.58(8), pp.2448-2455
08/2011

Abstract

Grain-boundary trap state low-temperature polycrystalline silicon (poly-Si) thin-film transistors (LTPS TFTs) negative-bias temperature instability (NBTI) plasma-process-induced damage (PPID)
The plasma-process-induced damage (PPID) of low-temperature polycrystalline silicon (poly-Si) thin-film transistors (TFTs) during the etching of the poly-Si film was investigated in this paper. The results reveal the relationship between the device degradation and the PPID during TFT liquid-crystal-display fabrication. This degradation is caused in part by the damage at the edge of the poly-Si film in plasma exposure. The trapped-state densities N trap are measured to clarify the relationship between instability and plasma etching damages. The plasma-process condition substantially affects the PPID of the poly-Si etching process. The main mechanism is the generation of charge trapping states at the poly-Si grain boundary in the damaged edge of the TFT channel active region. The electrical recovery from the plasma damage is also studied with various postetching treatments. Hydrogen-base plasma treatment and laser anneal process are revealed to improve the device characteristics due to reduction of charge trapping states. © 2010 IEEE.

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