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Fabrication, characterization and simulation of Ω- gate twin poly-Si FinFET nonvolatile memory
Journal article   Open access   Peer reviewed

Fabrication, characterization and simulation of Ω- gate twin poly-Si FinFET nonvolatile memory

Mu-Shih Yeh, Yung-Chun Wu, Min-Feng Hung, Kuan-Cheng Liu, Yi-Ray Jhan, Lun-Chun Chen and Chun-Yen Chang
Nanoscale Research Letters, Vol.8(1)
2013

Abstract

-gate FinFET Flash memory Nanowires Nonvolatile memory TFT Three-dimensional Twin poly-Si
This study proposed the twin poly-Si fin field-effect transistor (FinFET) nonvolatile memory with a structure that is composed of Ω-gate nanowires (NWs). Experimental results show that the NW device has superior memory characteristics because its Ω-gate structure provides a large memory window and high program/erase efficiency. With respect to endurance and retention, the memory window can be maintained at 3.5 V after 10 4 program and erase cycles, and after 10 years, the charge is 47.7% of its initial value. This investigation explores its feasibility in the future active matrix liquid crystal display system-on-panel and threedimensional stacked flash memory applications. © 2013 Yeh et al.
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https://doi.org/10.1186/1556-276X-8-331View
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