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Failure mechanism for input buffer under CDM test
Journal article   Open access   Peer reviewed

Failure mechanism for input buffer under CDM test

Tzu-Cheng Kao, Chung-Yu Hung, Jian-Hsing Lee, Chen-Hsin Lien, Chien-Wei Chiu, Kuo-Hsuan Lo, Hung-Der Su and Wu-Te Weng
Electronics Letters, Vol.50(9), pp.667-669
24/04/2014

Abstract

The influence of the body layout on the charged device model (CDM) failure site and the robustness of the input buffer is explored. The failure analysis results confirm that the gate oxide is damaged. The failure site can be moved from the region above the channel to the overlap region between the source and the gate once the body layout is cut from a ring into a small segment, providing direct evidence demonstrating that the CDM current flows through the gate oxide via the body and the source of the transistor, since both connect to the Vss bus line. Otherwise, changing the body layout of the input buffer transistor does not vary the failure location. © The Institution of Engineering and Technology 2014.
url
https://doi.org/10.1049/el.2013.4094View
Published (Version of record) Open

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