摘要
Hafnium oxide-based ferroelectric field-effect transistors (FeFETs) are redefining non-volatile memory (NVM) by enabling low-power, high-speed, and compatibility with advanced complementary metal-oxide-semiconductor nodes. Exploiting polarization-induced threshold voltage shifts in ultra-scaled gate stacks, FeFETs achieve sub-5 V write voltages, <10 ns switching, on/off ratios > 10(3) , > 10(6) s data retention, and endurance up to 10 8 cycles under optimized stress. This review consolidates recent advances in orthorhombic phase stabilization via dopant engineering, interfacial optimization, and defect dynamics that dictate performance variability. Compared to resistive RAM, phase-change, magnetic, and flash memories, FeFETs demonstrate superior integration potential for storage-class memory and compute-in-memory applications. Silicon-channel devices already achieve <100 ns read/write speeds and programming energy near 100 fJ/bit, with scalability beyond the 28 nm node. Innovations-such as La doping, asymmetric gate stacks, and oxide semiconductors, such as indium gallium zinc oxide and molybdenum sulfide-have enabled sub-1 V operation and endurance > 10(10) cycles. Reliability concerns including wake-up and fatigue are linked to oxygen vacancy migration, interface trap formation, and phase boundary evolution, elucidated through cycling endurance, data retention, and low-frequency noise analysis. We also highlight industrial progress in stacked FeFET arrays and 3D NVM structures, targeting commercialization by 2028-2030. This article charts a complete trajectory from material to system level, establishing FeFETs as a cornerstone for secure, fast, and energy-efficient next-generation memory. (c) 2025 Author(s). All article content, except where otherwise noted, is licensed under a Creative Commons Attribution (CC BY) license