Abstract
We propose a new general-purpose routing algorithm for very large scale integrated (VLSI) and printed circuit boards (PCB) designs. Ideas behind both the maze-running algorithm and the hierarchical routing algorithm are combined into a powerful algorithm called hybrid routing. The new algorithm demonstrates a speed compatible to a hierarchical router and produces routings with quality equivalent to that by a maze router. Hybrid routing is based on the maze-running method with a third search dimension added. The extra search space is built by recursively constructing a hierarchy of coarser grid meshes. By means of a parameter-controlled expansion into the coarser meshes, the hybrid router is able to find the preferred search region very quickly and will not miss local information as a hierarchical router does. A user given parameter can turn our algorithm into a pure maze router, a pure hierarchical router, or a wide spectrum of hybrid routers with different speed /quality characteristics between the extremes. We have implemented this algorithm and integrated it into a global router. With this approach, we can easily handle a routing of large size, such as those encountered in the sea-of-gate layout. We describe the data structure and the algorithm, analyze the storage requirement, study the algorithm’s behavior under various circumstances, and compare it with the Lee’s algorithm. © 1990 IEEE