IMPROVED SYSTOLIC ARRAY FOR LINEAR DISCRIMINANT FUNCTION CLASSIFIER.

Chin-Liang Wang; Che-Ho Wei; Sin-Horng Chen

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IMPROVED SYSTOLIC ARRAY FOR LINEAR DISCRIMINANT FUNCTION CLASSIFIER.

Journal article

Peer reviewed

IMPROVED SYSTOLIC ARRAY FOR LINEAR DISCRIMINANT FUNCTION CLASSIFIER.

Chin-Liang Wang, Che-Ho Wei and Sin-Horng Chen

Electronics Letters, Vol.22(2), pp.85-86

01/01/1986

Abstract

A word-level systolic array with 100% efficiency is described for the linear discriminant function classifier. When compared with two previous word-level linear classifier arrays, it not only saves about C inner product step cells, where C is the number of weighted vectors used, but also simplifies the chip's I/O design.

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Title: IMPROVED SYSTOLIC ARRAY FOR LINEAR DISCRIMINANT FUNCTION CLASSIFIER.
Creators - without role: Chin-Liang Wang - Natl Chiao Tung Univ, Inst of , Electronics, Hsinchu, Taiwan
Che-Ho Wei - Natl Chiao Tung Univ, Inst of , Electronics, Hsinchu, Taiwan
Sin-Horng Chen - Natl Chiao Tung Univ, Inst of , Electronics, Hsinchu, Taiwan
Publication Details: Electronics Letters, Vol.22(2), pp.85-86
Identifiers: 9957766421006774
Academic Unit: Institute of Communications Engineering, College of Electrical Engineering and Computer Science, National Tsing Hua University
Language: English
Resource Type: Journal article

IMPROVED SYSTOLIC ARRAY FOR LINEAR DISCRIMINANT FUNCTION CLASSIFIER.

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