Abstract
This paper describes the design, fabrication and characterization of a complementary metal-oxide-semiconductor (CMOS) micro-electro-mechanical-system (MEMS) accelerometer implemented in a 0.18 μm multi-project wafer (MPW) CMOS MEMS process. In addition to the standard CMOS process, an additional aluminum layer and a thick photoresist masking layer are employed to achieve etching and microstructural release. The structural thickness of the accelerometer is up to 9μm and the minimum structural spacing is 2.3μm. The out-of-plane deflection resulted from the vertical stress gradient over the whole device is controlled to be under 0.2μm. The chip area containing the micromechanical structure and switched-capacitor sensing circuit is 1.18×0.9 mm 2 , and the total power consumption is only 0.7 mW. Within the sensing range of 6 G, the measured nonlinearity is 1.07% and the cross-axis sensitivities with respect to the in-plane and out-of-plane are 0.5% and 5.8%, respectively. The average sensitivity of five tested accelerometers is 191.4 mV G 1 with a standard deviation of 2.5 mV G 1 . The measured output noise floor is 354μG Hz 1/2 , corresponding to a 100 Hz 1 G sinusoidal acceleration. The measured output offset voltage is about 100 mV at 27°C, and the zero-G temperature coefficient of the accelerometer output is 0.94 mV°C 1 below 85°C. © 2012 IOP Publishing Ltd.