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Improved Reliability for Back-End-of-Line Compatible Ferroelectric Capacitor with 3 bits/cell Storage Capability by Interface Engineering and Post Deposition Annealing
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Improved Reliability for Back-End-of-Line Compatible Ferroelectric Capacitor with 3 bits/cell Storage Capability by Interface Engineering and Post Deposition Annealing

Hao-Kai Peng, Ting-Chieh Lai, Yu-Cheng Kao, Chia-Ming Liu, Pin-Jiun WuYung-Hsien Wu
IEEE Electron Device Letters
2022

摘要

back-end-of-line (BEOL) Capacitors cycle-to-cycle variation Electrodes Ferroelectric films ferroelectric random-access memory (FeRAM) FORC Hafnium oxide Iron multi-bit storage Nonvolatile memory Random access memory Electronic Optical and Magnetic Materials Electrical and Electronic Engineering
AlON/HfZrO<sub>x</sub> (HZO)/HfO<sub>2</sub> stack with post-deposition annealing (PDA) process at 400 &null is proposed to implement BEOL compatible ferroelectric (FE) capacitors. While interface engineering by AlON and HfO<sub>2</sub> enhances P<sub>r</sub> to enable more bits storage, PDA reduces oxygen vacancies in the HZO by eliminating the reaction between HZO and top electrode. The FE capacitors display wake-up free behavior and the first reported 3 bits/cell operation with 8 stable states up to 10 <sup>8</sup> cycles (&null V/1 &null), non-overlapped cycle-to-cycle and device-to-device variation (&null &null 0.4 &null <sup>2</sup> ), outperforming other FE capacitors and demonstrating high potential for high-density embedded ferroelectric random-access memory (FeRAM).

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