Abstract
The electrical and surface characteristics of a metal-oxide-semiconductor (MOS) device with hafnium oxynitride (HfO x N y ) gate dielectric treated with chemical dry etching (CDE) were investigated. The surfaces studied in this work include HfO x N y /Si surface and contact-hole-bottom Si surface. A CDE treatment was adopted to smooth surface morphology and to reduce carbon and fluorine residue contamination for TaN/HfO x N y /Si capacitors as well as to minimize the detrimental effects induced by plasma etching at N + /P junction. MOS devices with CDE treatment possess lower gate leakage current and dispersion, smaller stress-induced leakage current (SILC), and larger time to breakdown (T bd ). N + /P junction with a suitable depth of CDE treatment exhibits a smaller ideality factor and reverse leakage current. The possible mechanism for the improvement is also discussed. © 2005 Elsevier Ltd. All rights reserved.