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Interblock memory for turbo coding
Journal article   Peer reviewed

Interblock memory for turbo coding

Chia-Jung Yeh, Yeong-Luh Ueng, Mao-Chao Lin and Ming-Che Lu
IEEE Transactions on Communications, Vol.58(2), pp.390-393
02/2010

Abstract

Binary codes Concatenated codes Turbo codes
We investigate a binary code, which is implemented by serially concatenating a multiplexer, a multilevel delay processor, and a signal mapper to a binary turbo encoder. To achieve improved convergence behavior, we modify the binary code by passing only a fraction of the bits in the turbo code through the multilevel delay processor and the signal mapper. Two decoding methods are discussed and their performances are evaluated. © 2006 IEEE.

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