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Investigation of p-channel and n-channel junctionless gate-all-around polycrystalline silicon nanowires with silicon nanocrystals nonvolatile memory
Journal article   Peer reviewed

Investigation of p-channel and n-channel junctionless gate-all-around polycrystalline silicon nanowires with silicon nanocrystals nonvolatile memory

Mu-Shih Yeh, Yung-Chun Wu, Ming-Hsien Chung, Yi-Ruei Jhan, Kuei-Shu Chang-Liao, Kuan-Cheng Liu, Min-Hsin Wu and Min-Feng Hung
Applied Physics Letters, Vol.105(4), 042109
28/07/2014

Abstract

This work presents p-channel and n-channel junctionless (JL) polycrystalline silicon (poly-Si) nanowires gate-all-around (GAA) nonvolatile memory (NVM) devices with silicon nanocrystals charge trapping layer. Experimental results indicate that the n-channel device has better programming efficiency and p-channel device has better erasing efficiency. For p-channel device, an extrapolation of the memory window to 10 yr demonstrates that 95% of the stored charge can be retained at high temperature of 85 °C. Such the p-channel and n-channel JL-GAA NVMs are feasible for use in system-on-panel (SOP) and 3-D stacked flash memory applications. © 2014 AIP Publishing LLC.

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