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Loop Dynamics Analysis of PAM-4 Mueller–Muller Clock and Data Recovery System
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Loop Dynamics Analysis of PAM-4 Mueller–Muller Clock and Data Recovery System

秉璇 謝, Kunal YadavAnthony Chan Carusone
IEEE Open Journal of Circuits and Systems
10/2022

摘要

Analog-to-digital converter (ADC)-based receiver;clock and data recovery;digital equalization;feed-forward equalizer (FFE);time interleaving

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url
https://doi.org/10.1109/OJCAS.2022.3211844檢視
已出版(紀錄版本) 開放

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