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Loop-reduction LLL algorithm and architecture for lattice-reduction-aided MIMO detection
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Loop-reduction LLL algorithm and architecture for lattice-reduction-aided MIMO detection

Chun-Fu Liao, Li-Wei ChaiYuan-Hao Huang
Journal of Electrical and Computer Engineering, 876380
2012

摘要

We propose a loop-reduction LLL (LR-LLL) algorithm for lattice-reduction- aided (LRA) multi-input multioutput (MIMO) detection. The LLL algorithm is an iterative algorithm that contains many check and process operations; however, the traditional LLL algorithm itself possesses a lot of redundant check operations. To solve this problem, we propose a look-ahead check technique that not only reduces the complexity of the LLL algorithm but also produces the lattice-reduced matrix which obeys the original LLL criterion. Simulation results show that the proposed LR-LLL algorithm reduces the average number of loops or computation complexity. Besides, it also shortens the latency of clock cycles about 19.4, 29.1, and 46.1 for 4 4, 8 8, and 12 12 MIMO systems, respectively. Copyright © 2012 Chun-Fu Liao et al.

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https://doi.org/10.1155/2012/876380檢視
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