Low-power memory device with NiSi2 nanocrystals embedded in silicon dioxide layer

P.H. Yeh; C.H. Yu; L.J. Chen; H.H. Wu; P.T. Liu; T.C. Chang

doi:10.1063/1.2126150

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Low-power memory device with NiSi2 nanocrystals embedded in silicon dioxide layer

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Low-power memory device with NiSi2 nanocrystals embedded in silicon dioxide layer

P.H. Yeh, C.H. Yu, L.J. Chen, H.H. Wu, P.T. Liu and T.C. Chang

Applied Physics Letters, Vol.87(19), pp.1-3

07/11/2005

DOI: https://doi.org/10.1063/1.2126150

Appears in keyword about Physics

Abstract

A metal-oxide-semiconductor structure with NiSi2 nanocrystals embedded in the SiO2 layer has been fabricated. A pronounced capacitance-voltage hysteresis was observed with a memory window of 1 V under the 2 V programming voltage. The processing of the structure is compatible with the current manufacturing technology of semiconductor industry. c 2005 American Institute of Physics.

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Title: Low-power memory device with NiSi2 nanocrystals embedded in silicon dioxide layer
Creators - without role: P.H. Yeh - National Tsing Hua University
C.H. Yu - Department of Materials Science and Engineering , National Tsing Hua University
L.J. Chen - National Tsing Hua University
H.H. Wu - National Sun Yat-sen University
P.T. Liu - National Institutes of Applied Research
T.C. Chang - National Sun Yat-sen University
Publication Details: Applied Physics Letters, Vol.87(19), pp.1-3
Identifiers: 9957771076106774
Academic Unit: Department of Materials Science and Engineering, College of Engineering, National Tsing Hua University
Language: English
Resource Type: Journal article

Low-power memory device with NiSi2 nanocrystals embedded in silicon dioxide layer

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