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MONOS memory in sequential laterally solidified low-temperature poly-Si TFTs
Journal article   Peer reviewed

MONOS memory in sequential laterally solidified low-temperature poly-Si TFTs

Szu-I Hsieh, Hung-Tse Chen, Yu-Cheng Chen, Chi-Lin Chen and Ya-Chin King
IEEE Electron Device Letters, Vol.27(4), pp.272-274
04/2006

Abstract

Band-to-band tunneling-induced hot hole injection (BBHH) Channel hot electron (CHE) Grain boundary (GB) Liquid crystal display (LCD) Low-temperature poly-Si (LTPS) Metal-oxide-nitride-oxide-polysilicon (MONOS) Sequential lateral solidification (SLS) Thin-film transistor (TFT)
A metal-oxide-nitride-oxide-polysilicon (MONOS) memory device fabricated by sequential lateral solidified (SLS) low-temperature polycrystalline silicon (poly-Si) technology on a glass substrate was investigated. The Si protrusions at grain boundaries (GBs) as a result of the SLS process can be well controlled and located along the width direction of the transistor. Protrusions at the GBs are utilized as emitting source to achieve a MONOS memory device with low operation voltage (≤ 20 V), fast program/erase time, and wide V th window by field-enhanced channel hot electron injection for programming and field-enhanced band-to-band tunneling-induced hot hole injection for erase. This is the first study to demonstrate a nonvolatile memory device in low-temperature poly-Si thin-film transistor (LTPS TFT) technology, which can be integrated with TFT-liquid crystal display, to reduce power consumption for mobile applications. © 2006 IEEE.

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