摘要
In this study, a multilevel logic-compatible two-transistor-two-resistor (2T2R) latch array for computing-in-memory (CIM) is proposed, featuring high power efficiency, fast response, and high resolution. Combining the resistive switching pairs of the Hf-based gate dielectric layers and a near-threshold-operated output transistor for resistance ratio enhancement, non-volatile memory (NVM) latch arrays are implemented on Si. Taking the advantage of the stable and reliable output by complementary resistive states, the ON- OFF current ratio can be greatly improved. In addition, low power consumption by the near-threshold operation, high data density by multilevel cell, and the novel latch arrays successfully enhance the accuracy and lower power of the analog multiply-accumulate-operation (MAC) and become a promising module in the CIM applications.