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Multilevel antifuse cells with programmable contact in pure 90 nm logic process
Journal article   Peer reviewed

Multilevel antifuse cells with programmable contact in pure 90 nm logic process

Chia-En Huang, Yuan Heng Tseng, Cheng-Hsiung Kuo, Yu-De Chih, Ya-Chin King and Chrong Jung Lin
Japanese Journal of Applied Physics, Vol.49(1 Part 1), 014202
2010

Abstract

A multilevel oxide antifuse cell with programmable contact, fully compatible with a standard complementary metal-oxide-semiconductor (CMOS) logic process, is firstly presented for logic nonvolatile memory applications. A four-state antifuse cell has a stable read window and a very small cell size of 0.097μm 2 /bit. By adopting the multiple stages in oxide breakdown, four states of read current level have been successfully demonstrated on this cell fabricated by a standard 90nm CMOS logic process. A fast programming speed of 10 μs can be obtained using a low programming voltage of less than 4V. With excellent technology scalability and adaptability, this multilevel antifuse cell provides a very promising solution for programmable logic beyond a 90nm technology node. © The Japan Society of Applied Physics.

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