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Multilevel suspended thin-film inductors on silicon wafers
Journal article   Peer reviewed

Multilevel suspended thin-film inductors on silicon wafers

Chih-Ming Tai and Chien-Neng Liao
IEEE Transactions on Electron Devices, Vol.54(6), pp.1510-1514
06/2007

Abstract

Quality factor Silicon Suspended structure Thin-film inductor
Single-level and double-level (DL) suspended inductors on low-resistivity silicon wafers were successfully fabricated and characterized in the multigigahertz frequency range. Three-dimensional suspended inductor structures were realized by a sacrificial molding and electroplating technique. The multilevel suspended inductor structure can reduce the capacitive coupling with the silicon substrate effectively and achieve a large inductance-to-area ratio. It is found that the DL suspended inductor was able to achieve a peak quality factor of 27.7 with an inductance of 8.35 nH, leading to a rather high figure-of-merit of 841 nH/mm 2 by considering the inductor lateral dimensions. The DL suspended inductor was also encapsulated by a polyimide layer to investigate the influence of interlayer dielectric on the inductor properties. © 2007 IEEE.

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