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Multiple wire reconnections based on implication flow graph
Journal article   Peer reviewed

Multiple wire reconnections based on implication flow graph

Zhong-Zhen Wu and Shih-Chieh Chang
ACM Transactions on Design Automation of Electronic Systems, Vol.11(4), pp.939-952
10/2006

Abstract

Automatic test pattern generation (ATPG) Global flow optimization (GFO) Implication flow graph (IFG) Mandatory assignment Multiple wire reconnection Redundant wire
Global flow optimization (GFO) can perform multiple fanout/fanin wire reconnections at a time by modeling the problem of multiple wire reconnections with a flow graph, and then solving the problem using the maxflow-mincut algorithm on the flow graph. In this article, we propose an efficient multiple wire reconnection technique that modifies the framework of GFO, and as a result, can obtain better optimization quality. First, we observe that the flow graph in GFO cannot fully characterize wire reconnections, which causes the GFO to lose optimality in several obvious cases. In addition, we find that fanin reconnection can have more optimization power than fanout reconnection, but requires more sophisticated modeling. We reformulate the problem of fanout/fanin reconnections by a new graph, called the implication flow graph (IFG). We show that the problem of wire reconnections on the implication flow graph is NP-complete and also propose an efficient heuristic on the new graph. To demonstrate the effectiveness of our proposed method, we conduct an application which utilizes the flexibility of the wire reconnections explored in the logic domain to further minimize interconnects in the physical layout. Our experimental results are very exciting. © 2006 ACM.

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