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Polycrystalline silicon thin-film flash memory with Pi-gate structure and Hfo2 charge trapping layer
Journal article   Peer reviewed

Polycrystalline silicon thin-film flash memory with Pi-gate structure and Hfo2 charge trapping layer

Lun-Jyun Chen, Yung-Chun Wu, Ji-Hong Chiang, Min-Feng Hung, Chin-Wei Chang and Po-Wen Su
Japanese Journal of Applied Physics, Vol.48(12), 120215
12/2009

Abstract

This work demonstrates a polycrystalline silicon (poly-Si) thin-film flash nonvolatile memory (NVM) that utilized Pi-shaped gate (Pi-gate) multiple nanowire channels with an HfO 2 charge trapping layer. The Pi-gate nanowires (NWs) flash NVM has higher program/erase (P/E) efficiency than the conventional memory with single-channel (SC) structure. This high P/E efficiency is due to the better gate control of the Pi-gate structure. As a result of the high P/E speed, up to 10 5 P/E cycles can be realized. The HfO 2 charge trapping layer has a deep conduction band and spatial isolated traps. These characteristics result in good data retention, only 10% charge loss after 10 9 s. © 2009 The Japan Society of Applied Physics.

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